Modeling the Effects of Thermal Pad Voiding on Quad Flatpack No-lead (QFN) Components

Abstract

Finite element modeling was used to evaluate the effects of thermal pad solder voiding on the thermal resistance of Quad Flatpack No Lead components.  This included two different approaches for modeling solder voids: many small, distributed voids, the effects of which were averaged across the entire solder contact area or a single discrete void.  Two approaches were used for defining the thermal path established in the solder.  The effects of other design parameters - thermal boundary conditions, the presence of thermal vias under the package, and the size of the die power dissipation area – were also addressed. Modeling showed that thermal vias and external boundary conditions had the most significant impact on the package thermal resistance. Solder pad voids and concentrated die-level heat dissipation, for the range used in this study, had noticeable but less significant impacts on thermal resistance.  The study also compared different approaches for simulating solder voiding and identified ranges in which modeling simulations are most appropriate.