Miniaturized Stacked Die QFN for Tire Pressure Monitoring System Applications


  • Andrew Mawer NXP Semiconductors
  • Mollie Benson NXP Semiconductors
  • Dwight Daniels NXP Semiconductors
  • A R Nazmus Sakib NXP Semiconductors
  • Vishrudh Sriramprasad NXP Semiconductors



QFN, Board Level Reliability, BLR, Tire Pressure Monitoring System, TPMS, NiPdAu, pre-plated leadframe, PPF, intermetallic, IMC, step-cut, dimple.


Tire Pressure Monitoring Systems (TPMS) are electronic wireless systems that monitor and report air pressure inside pneumatic tires in real time.  An example of a TPMS module integrated with the valve stem and showing the typical tire mounting location is shown in Figure 1.  For their safety and fuel economy benefits, starting with the mid-2000's, active TPMS were mandated on many vehicles worldwide.  The NHTS estimates that there are approximately 23,000 accidents and 535 fatalities annually involving tire underinflation and blowouts [1]. The use of TPMS has been shown to result in improved fuel economy and therefore reduced carbon emissions [2].  TPMS in passenger vehicles was mandated in the US as of Sept. 1, 2007 under the TREAD Act, in the European Union as of Nov. 1, 2012 and in South Korea as of Jan.1, 2013.  Countries like Russia, Indonesia, the Philippines, Israel, Malaysia, Turkey and many others soon followed [3].

The first TPMS systems were large and bulky with a significant electronics content [4]. Since that time TPMS electronics have gotten more energy efficient and form factors have come down dramatically.  This paper will outline an effort to miniaturize an existing 1.0 mm pitch, 7x7x2.2 mm body size 24 lead QFN (Quad Flat No Leads) TPMS down to a 4x4x1.98 mm body size QFN with 0.5 mm pitch that would still meet automotive AEC Grade 1 reliability requirements. The original 7x7 mm three die QFN package consisted of an ASIC, a pressure sensor and an accelerometer. This miniaturization led to many technical challenges at both the package and board level.  This paper will primarily address the board level reliability (BLR) challenges encountered due to the large silicon to package ratio along with the 50% reduction in pitch.  Through a series of test vehicles with variables such as QFN leadframe surface finish, lead shape and size, wettable flank (WF) technology and anchors pads, the BLR was successfully improved to the point where it met application requirements.

Author Biographies

Andrew Mawer, NXP Semiconductors

Andrew Mawer is the Global Package Design Manager at NXP Semiconductors in Austin, TX.  Immediately prior to that he managed an analytical and reliability laboratory.  Andrew has been with NXP, formerly Motorola then Freescale for a total of 28 years.  Andrew previously spent four years at HP where he was involved with the implementation of some of the first high pin count PBGAs in the industry.  He has authored and presented over 40 papers and authored two book chapters.   He is an active member of SMTA and has served on the Technical Committee of the SMTA-I Conference, the Review Board of the SMTA Journal and with various leadership roles within the Central Texas SMTA chapter.  He received the SMTA National Member of Technical Distinction Award in 2007.  Andrew received his B.S. in Mechanical Engineering from the University of Texas in 1987 and M.S. in Mechanical Engineering from Rice University in 1989.  He received the Outstanding Young Mechanical Engineer Award from UT’s Mechanical Engineering Dept in 2007.

Mollie Benson, NXP Semiconductors

Mollie Benson works at NXP Semiconductors in Austin, TX as a Packaging Engineer for Analog and Mixed Signal Packaging. She previously supported the Product Diagnostic Lab for three years, where she managed the Board Level Reliability and Package Analysis activities. Mollie joined NXP in 2017 and has had a variety of packaging experience including Board Level Reliability (Thermal Cycling and Shock, Monotonic Bend, and JEDEC Drop testing), SMT assembly, PCB design, and failure analysis. Mollie has a Bachelor of Science degree in Materials Engineering from California Polytechnic State University, San Luis Obispo.

Dwight Daniels, NXP Semiconductors

Dwight has been in Semiconductor Product Engineering and Packaging since 1984. He started his career at Motorola Semiconductor Product Sector supporting logic devices in relatively small, simple packages. Since then he has moved to a development lab where he spent several years working on IC’s in high reliability packages for government projects, followed by packaging of Gate Arrays in high pin count QFP, BGA and thermally enhanced packages. He’s developed packages and processes for digital image sensor assembly and RF handset modules. Most recently Dwight has been working on the challenges of packaging motion and pressure sensor devices for consumer and automotive applications. Dwight holds 20 US patents, has been published in multiple trade journals, proceedings and magazines and has served on the editorial review board of 1 industry magazine.

A R Nazmus Sakib, NXP Semiconductors

A R Nazmus Sakib performed this work at NXP Semiconductors in Austin, TX as an IC Packaging Materials Engineer during his tenure from May 2017 to March 2021. He is currently employed as Staff IC Packaging Engineer at Renesas Electronics America in Austin, TX. During his time at NXP, he was involved in die attach, underfill and solder material characterization, material selection and deployment for various packaging technologies such as QFN, FCPBGA, Wire bonded BGA etc. Sakib has hands-on experience with DMA, TMA, DSC, TGA and Nanoindentation. Sakib has a Bachelor of Science degree in Mechanical Engineering from Bangladesh University of Engineering and Technology and a PhD in Mechanical Engineering from University of Texas at Arlington. 

Vishrudh Sriramprasad, NXP Semiconductors

Vishrudh Sriramprasad is starting a Masters in Sustainable Engineering at Arizona State University in the Fall of 2021. In May of 2021, he graduated with a Bachelor of Science in Mechanical Engineering from the University of Texas at Austin. During the summer of 2020, Vishrudh interned at NXP Semiconductors as a Reliability and Package Analysis Intern. At NXP he learned how to pot, image, and analyze failed package samples in an SEM. He specifically worked with the TPMS 4x4 and PF7100 packages during his internship. Looking forward, Vishrudh hopes to contribute towards research in the field of direct air carbon capture at ASU and promote sustainable energy practices and policies.




How to Cite

Mawer, A., Benson, M., Daniels, D., Sakib, A. R. N., & Sriramprasad, V. (2021). Miniaturized Stacked Die QFN for Tire Pressure Monitoring System Applications. Journal of Surface Mount Technology, 34(2), 16–22.